FinFET technology has recently seen a major increase in adoption for use within integrated circuits. The FinFET technology promises to provide the levels of scalability needed to ensure that the current progress with increased levels of integration within integrated circuits can be maintained. The basic tenet of Moore's law has held true for many years; essentially that the number of transistors on a given area of silicon doubles every two years.
To achieve the large increases in levels of integration, many parameters have changed. Fundamentally the feature sizes have reduced to enable more devices to be fabricated within a given area. However other figures such as power dissipation, and line voltage have reduced along with increased frequency performance. There are limits to the scalability of individual devices and as process technologies continue to shrink to 20 nm and beyond, it sometimes seems impossible to achieve the proper scaling of various device parameters, especially when it has been found that optimizing for one variable, for instance performance, can result in unwanted compromises in other areas, for instance power. It is therefore necessary to consider other more revolutionary options like a change in transistor structure and processing.